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| NJU7181 SIGNAL LEVEL SENSOR SYSTEM GENERAL DESCRIPTION The NJU7181 is a signal level sensor system IC. It sends a High flag to the microprocessor or other equipments whenever it detects the existence of the audio signal. The NJU7181 includes a delay circuit which allows the IC continue to hold the flag after the absence of the audio signal. This holding time can be adjusted with external capacitor. Together with its adjustable Input Sensitivity (by external resistor) & its characteristic of low current consumption and low operating voltage, NJU7181 is suitable for Eco-Design of Energy-using Products and for battery operated applications. PACKAGE OUTLINE TVSP8 FEATURES * Operating Voltage 0.9 to 5.5V * Low Operating Current 55A typ. * Delay circuit for long Recovery time * Adjustable Recovery time by external capacitor * Adjustable Input Sensitivity by external resistance * C-MOS Technology * Package Outline TVSP8, ESON8 ESON8 (PLAN) APPLICATIONS * Power Saving for battery operated devices * Muting Application * Memory saving for recording devices * Half- duplex transmission application BLOCK DIAGRAM V+ ON OFF V+ External Trigger OUT D Level Detector L Delay CLR Latch IN Version 5.1E -1- NJU7181 PIN CONFIGURATION TVSP8 / ESON8 1 8 4 5 No. 1 2 3 4 5 6 7 8 Symbol IN AMP_OUT TRIN GND CAP_D RES_D OUT V+ AC Input Amplifier Output Function External Trigger Input Ground Delay Time Capacitor Delay Time Resister DC Output Supply Voltage Version 5.1E -2- NJU7181 ABSOLUTE MAXIMUM RATING (Ta=25C) PARAMETER SYMBOL Supply Voltage Power Dissipation Maximum Input Voltage Operating Temperature Range Storage Temperature Range V + RATING +7 470 (Note1) :TVSP8 450 :ESON8 0 ~ V+ (Note2) -40 ~ +85 -40 ~ +125 UNIT V mW V C C PD VIMAX Topr Tstg (Note1) EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting (Note2) Don't put Input Voltage more than Power Supply Voltage. (Ta=25C, V+=3V, R1=10k, R2=100k, Rd=220k, Cd=10nF) ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL V + TEST CONDITION No signal, RL= f=1kHz MIN. 0.9 -45 1.0 TYP. 55 -41.5 1.5 1.5 1,500 MAX. 5.5 100 -38 2.0 2.0 - UNIT V A dBV Sec Sec Sec Operating Voltage Operating Current Input Sensitivity Delay Time 1 Delay Time 2 Delay Time 3 IDD VINS Tdelay1 Tdelay2 Tdelay3 V+=0.9V Cd =10F 1.0 - DC CHARACTERISTICS DC Output Terminal (7pin) (Ta=25C) PARAMETER High Level Output Voltage Low Level Output Voltage (Ta=25C) SYMBOL VOH VOL TEST CONDITION ISOURCE =1mA ISINK =1mA MIN. V -0.2 0 + TYP. - MAX. V + UNIT V V 0.2 External Trigger Switch Terminal (3pin) High Level Input Voltage Low Level Input Voltage VIH VIL V+-0.2 0 V+ 0.2 V V Version 5.1E -3- NJU7181 TEST CIRCUIT VDD V 1mA 220k VDD 10uF + 8 V+ 7 OUT 6 RES_D 1nF 5 CAP_D GND 4 NJU7181 IN 1 AMP_OUT 2 TRIN 3 IN 10uF + 10k 100k 10pF A IDD Version 5.1E 22k -4- NJU7181 APPLICATION CIRCUIT Audio Signal Input Main Path V+ ON Audio Signal Output 100k OFF V+ External Trigger DC Output D Level Detector L Delay CLR Latch High or Low DC voltage inform ation (to Micro Processor, etc) CD Ci R1 R2 RD=220k Input sensitivity (Detection level) Audio Signal Input Delay Time (Adjustable from a few second to a few minutes by CD ) DC Output (NJU7181) Low High Low Version 5.1E -5- NJU7181 Attack Time: Note: OUTPUT 220k VDD + 8 V+ 7 OUT 10uF 6 RES_D 10nF 5 CAP_D GND 4 Supply De-coupling capacitor has to be placed near IC (especially w hen IC socket is being used). 10uF + NJU7181 IN 1 AMP_OUT 2 TRIN 3 10pF 100k External Control (Control from MicroProcessor, etc.) 10k 100k Input Feedback Capacitor is required to prevent the possibility to of oscillation in the input stage. Version 5.1E -6- NJU7181 APPLICATION NOTE * DC Output Waveform Scenario Scenario 1: Power-ON - Output will be high initially when NJU7181 is first powered up even if there is no input signal detected. POWE ON with no signal detected R P ower On Power Trigger No S ignal detected (Low) Audio S ignal Input No Input S ignal detected Delay TIme : Tdelay DC Output (NJ U7181) LOW High LOW Scenario 2: Only Audio Signal detected - Output will be or maintain high when either an input signal or trigger signal is detected. The delay circuit will only be activated when both signals is not present. NJU7181 will then hold the output level for a delay time which can be adjusted by the Capacitor value @ pin 5. Audio signal present Power On Power Trigger No Signal detected (Low) Audio S ignal Input Signal Detected Delay TIme : Tdelay LOW High LOW Version 5.1E -7- NJU7181 Scenario 3: Trigger Signal detected (2 cases) - Output will be or maintain high when either an input signal or trigger signal is detected. The delay circuit will only be activated when both signals is not present. NJU7181 will then hold the output level for a delay time which can be adjusted by the Capacitor value @ pin 5. Case 1: Trigger signal present (After output LOW) Power On Power Trigger detected Trigger Audio S ignal Input Signal Detected Delay TIme : Tdelay Delay TIme : Tdelay DC Output (NJU7181) LOW High High due to triggger LOW LOW C ase 2: Trigger signal present (Duringoutput HIGH) Power On Power Trigger detected Trigger Audio S ignal Input Signal Detected Hold Time Delay TIme : Tdelay DC Output (NJU7181) LOW High LOW When hold time is shorter than Tdelay, DC _Output maintains High state. (C ounter RESET) Version 5.1E -8- NJU7181 Input Sensitivity [Ta =25C] The input sensitivity is defined as follows. VINS=20*log(R1/R2) - 21.5 [dBV] ----- (1) Note) The input sensitivity recommends the setting of -60dBV (1mVrms) or more. Note) The R2 value should be 100k or more. Frequency Response The input capacitor "Ci" forms HPF with "R1". The cut-off frequency is defined as follows. Please decide C1 value in consideration of the frequency response necessary for the signal-detecting. fc=1/(2xCixR1) [Hz] ----- (2) Delay time [With RD = 220Kohm] The Recovery time is defined as follows. Tdelay=1.5*108*CR [sec] ----- (3) Version 5.1E -9- NJU7181 TERMINAL DESCRIPTION Terminal SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE 1 IN AC Input 0.3V 2 AMP_OUT Amplifier Output 0.3V 3 TRIN External Trigger Input - 5 CAP_D Delay Time Capacitor 0V Version 5.1E - 10 - NJU7181 TERMINAL DESCRIPTION Terminal SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE 6 RES_D Delay Time Resistor 3uA x RD 7 OUT DC Output 0 or V+ 8 V+ Supply Voltage V+ Version 5.1E - 11 - NJU7181 TYPICAL CHARACTERISTICS Operating Current Vs Operating Voltage Cd = 10nF, Rd = 220k, No Input 100 90 Operating Current, Icc (A) Operating Current, Icc (A) Operating current Vs Temperature VDD = 3V, Cd = 10nF, Rd = 220k, No Input 100 90 80 70 60 50 40 80 70 60 50 40 30 20 10 0 0 1 2 3 4 5 6 7 8 105C 25C -40C 30 20 -50 -25 0 25 50 75 100 125 150 Operating Voltage, + (V) Temperature, (C) Output Voltage Vs Output Current Source VDD = 3V, Ta = 25C, Cd = 10nF, Rd = 220k, Output = High 3.5 3.0 Output voltage, VOH (V) Output Voltage Vs Output Current Sink VDD = 3V, Ta = 25C, Cd = 10nF, Rd = 220k, Output = High 3.5 -40C 3.0 Output voltage, VOL (V) 2.5 2.0 1.5 1.0 0.5 0.0 0.001 105C 2.5 105C 2.0 1.5 1.0 -40C 0.5 0.0 0.001 0.01 0.1 1 10 100 0.01 0.1 1 10 100 Output Source Current, (mA) Output Sink Current, (mA) Output Voltage Vs Temperature 6 VDD = 3V, Cd = 10nF, Rd = 220k, Output = High, Current Source = 1mA 0.3 Output Voltage Vs Temperature VDD = 3V, Cd = 10nF, Rd = 220k, Output = High, Current Sink = 1mA 5 0.25 OutPut Voltage, Vout (V) 4 Output Voltage, Vout (V) 0.2 3 0.15 2 0.1 1 0.05 0 -50 -25 0 25 50 75 100 125 150 0 -50 -25 0 25 50 75 100 125 150 Temperature, (C) Temperature, (C) Version 5.1E - 12 - NJU7181 TYPICAL CHARACTERISTICS Input Sensitivity Vs Temperature VDD = 3V, Cd = 10nF, Rd = 220k, R1=10k, R2=100k -35 -36 -37 -38 Input Sensitivity (dBV) Input Sensitivity (dBV) Input Sensitivity Vs Supply Voltage -35 -36 -37 -38 -39 -40 -41 -42 -43 -44 -45 -46 -40C 25C 105C VDD = 3V, Ta = 25C, Cd = 10nF, Rd = 220k, R1=10k, R2=100k -39 -40 -41 -42 -43 -44 -45 -46 -50 -25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 Temperature, (C) Supply Voltage VDD, (V) Delay Time Vs Capacitor VDD = 3V, Ta = 25C, Rd = 220k, R1=10k, R2=100k 10000 1000 100 Delay Time (sec) Gain vs Frequency 50 45 40 35 30 Gain (dB) VDD = 3V, Ta = 25C, Cd = 10nF, Rd = 220k, Measure @ pin 2 (AMP_OUT) 40dB(R1=1k, R2=100k) 10 1 0.1 0.01 25 20 15 10 5 20dB(R1=10k, R2=100k) 0.001 10pF 100pF 0.00001 0.0001 1nF 0.001 10nF 0.01 100nF 0.1 1uF 1 10uF 10 0 10 100 1,000 10,000 100,000 1,000,000 Capacitor Value (Cd) Frequency (Hz) [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Version 5.1E - 13 - |
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